ATM has such a characteristic that switching processing wherein all of information are divided into a certain unit called by the name of “cell” a packet size of which is a fixed length (consisting of five byte header and forty-eight byte data), and so divided information is transferred asynchronously can be carried out by only a hardware. Accordingly, such switching processing is suitable for treating unitarily multimedia information. For instance, a frequency can be changed in response to contents of data in accordance with such a manner wherein cells are transferred thinly in case of E-mail, while cells are transferred densely in case of voice or moving image. Thus, there is such a characteristic that a large amount of data can be transmitted at a high speed.
A procedure for communication in ATM switching system is specified in detail by ITU-TS (International Telecommunication Union-Telecommunication Standardization Section) being an international standardization institution, ATM forum or the like. Such type of ATM switching system is disclosed in, for example, Japanese Patent Kokai No. 2000-49799. The constitution of such ATM switching system will be described hereinafter by referring to the accompanying drawings wherein FIG. 1 is a block diagram showing a conventional ATM switching system.
In FIG. 1, an ATM switching system 100 is connected with subscriber's terminal units 151 and 152. The ATM switching system 100 comprises an ATM switch 101 for implementing switching processing, a multiplexer 102 connected to an input stage of the ATM switch 101, a separator 103 connected to an output stage of the ATM switch 101, an input line unit 104, an output line unit 105 connected to an output stage of the separator 103, a signal processor 106 for inputting signals from the subscriber's terminal unit 151 to the multiplexer 102, a speech channel controller 107 connected to the ATM switch 101, a call processor 108 connected to the speech channel controller 107, and a memory 109 connected to the call processor 108.
The signal processor 106 executes analytical processing for control signals such as call signals. The speech channel controller 107 controls establishment and release of an ATM connection based on call admission control (CAC) and call release control by means of the call processor 108. The call processor 108 implements call admission control on the basis of call signal and call release control on the basis of call releasing signal. Furthermore, when congestion appears on a certain line, the call processor 108 interrupts call admission with respect to the line. Namely, when a line becomes an over traffic state with respect to a transmission speed requested by return information (traffic information, bearer information and the like) relating to quality in a call signal (setup message), an establishment for ATM connection is rejected with respect to a call in question. Moreover, the memory 109 retains a variety of data such as call processing data, and subscribers' data.
Then, a case where data is transmitted from the subscriber's terminal unit 151 to the subscriber's terminal unit 152 will be described herein. In this case, the ATM switch 101 routes cells delivered from the subscriber's terminal unit 151 to the subscriber's terminal unit 152 by means of hardware switching to output the above-described cells to a transmission path connected to the subscriber's terminal unit 152. In order to realize such operation of the ATM switch 101 as described above, it is required to report information as to a counterpart to be communicated, quality in communication, a communicating zone and the like with respect to the ATM switching system and an ATM switching network. In this case, transmission for the report by an operator is a call.
Call processing in the ATM switching system 100 will be described. When a call signal is delivered from the subscriber's terminal unit 151, the call signal is input to the signal processor 106 through the input line unit 104. Then, such analytical processing whether or not the call signal has been composed in accordance with correct procedure and contents is made by the signal processor 106. Thereafter, the call processor 108 processes adequancies of a variety of reported information contained in the call signal, and if a communication service based on the reported information is permissible, the call processor makes required setting, so that a communication path is established via a route of the input line unit 104→the multiplexer 102→the ATM switch 101→the separator 103→the output line unit 105.
According to the conventional ATM switching system, however, the signal processor 106 and the call processor 108 are treated as a kind of components in the ATM switching system, a throughput capacity of them is suppressed to a certain level in view of hardware cost and average processing load, so that even if these processors are increased in the form of a plurality of pairs, there is a limitation as to the throughput capacity. For this reason, there are required simultaneous processing for a large amount of calls and signals, when all the terminal units connected to an ATM switching system issue calls at the same time, or when a tentative failure in a trunk transmission line is restored. Thus, a processing speed becomes insufficient in the signal processor 106 and the call processor 108, so that there arises a case where the system cannot respond to a request by a certain calling subscriber even if there is a free speech channel in the ATM switch 101.
Moreover, there is such a high possibility that a calling subscriber calls again after lapse of a certain period of time in the case where the ATM switching system did not respond to a call made by the calling subscriber. Such situation makes processing loads of the signal processor 106 and the call processor 106 worse. A countermeasure for such situation is to mount such signal and call processors 106 and 108 each having a sufficient processing speed. In an ATM switching system to which a large number of subscriber's terminal unite have been connected, however, when it is intended to assure a desired processing speed even in case where all the subscriber's terminal units were called, an increase in cost due to an increase in a hardware scale cannot be avoided.